A space/time tradeoff methodology using higher-order functions

R. Wester, J. Kuper
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引用次数: 3

Abstract

Large digital signal processing applications like particle filtering require a tradeoff between execution time and area in order to scale on FPGAs. This research focuses on developing a methodology to make this tradeoff based on structure in the mathematical description of the application. Structure is expressed using higher-order functions which are transformed using tradeoff rules to reduce area usage on FPGA.
使用高阶函数的空间/时间权衡方法
像粒子滤波这样的大型数字信号处理应用需要在执行时间和面积之间进行权衡,以便在fpga上进行扩展。本研究的重点是开发一种方法,以基于应用程序数学描述中的结构进行这种权衡。结构采用高阶函数表示,高阶函数采用权衡规则进行转换,以减少FPGA的面积占用。
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