Performance modeling of multiprocessors under correlated traffic

Abstract

A traffic model is proposed which does not assume the mutual independence of memory requests generated by the processors within a memory cycle, to evaluate performance in shared memory multiprocessors. The authors derive expressions for the bandwidth of crossbars and some shared bus networks. A traffic model is presented called the 2/sup N/-ary symmetric traffic model to analyze the performance of multiprocessor systems in the presence of correlated traffic. Some numerical results are provided for both full and partial bus networks.<>