Yury Antonov, M. Zahra, K. Stadius, Zahra Khonsari, Nouman Ahmed, Ilia Kempi, Juha Inkinen, Vishnu Unnikrishnan, J. Ryynänen
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引用次数: 2
Abstract
This paper describes a digital-friendly passives-less time delay cell that generates programmable phase-shifts for down converting front-end in LO-based beamsteering receiver. Cell design supports 1.5–6.5GHz broadband receiver operation and cell layout occupies an area of only 15×16.5μm2 including power supply rails and control logic. Simulated in 28nm CMOS technology, delay cell exhibits 6 distinct delay values {3, 3.5, 17, 19, 24, 43}ps consuming at most 220μW@IV.