Evolution of Multi-Gigabit Wireline Transceivers in CMOS

Abstract

Since the first OC-192 transceiver in CMOS was introduced in 2000, architecture and technology advancements have pushed wireline transceivers in CMOS to mainstream, even for OC-768 data rates. A diverse portfolio of multi-gigabit SerDes I/Os is now essential for large scale SOCs, not only for Networking but also Consumer applications. DSP-based transceivers with ADC frontends have forced a paradigm shift in how wireline transceivers are architected. This paper covers the evolution of CMOS wireline transceivers at Broadcom.