7 to 30V state-of-art power device implementation in 0.25 /spl mu/m LBC7 BiCMOS-DMOS process technology

Abstract

The performance of low-to-medium voltage power devices (7 V-30 V) implemented in an advanced 0.25 /spl mu/m BiCMOS-DMOS process is presented. The devices were optimized for a range of applications in this voltage group. In particular, the lateral DMOS devices have a capability of operating with the drain fully isolated from the substrate. The Rsp-BVdss performance for these devices is shown to be very competitive with respect to similar technologies. This performance is achieved without sacrificing the requirements for square electrical and lifetime safe operating area (SOA).