A chaos-based fully digital 120 MHz pseudo random number generator

Abstract

A chaos-based pseudo random number generator (PRNG) is implemented in a fully digital circuit with 120 MHz operation clock frequency. The chaotic equation called logistic equation is applied to the system model of PRNG. Noise can be injected to disturb the iterations with dead operation detected. The random quality of the chaos-based model is measured by the Sp. 800-22 random test package. The chaos-based PRNG has been designed and run in the UMC 1P6M 0.18/spl mu/m CMOS process with area of 944 /spl mu/m /spl times/ 813 /spl mu/m.