Computational complexity analysis of PTS technique under graphics processing unit

S. Yadav, P. Pradhan, Sarat Kumar Parra
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引用次数: 1

Abstract

Peak-to-Average Power Ratio (PAPR) reduction is a important signal processing aspect of Orthogonal Frequency Division Multiplexing (OFDM). Minimization of PAPR can be achieved efficiently using PTS Technique. The main drawback of PTS lies in its computational complexity due to large order of multiple IFFT and phase factor computation. Typically simulation to tune 4 sub-blocks with 4 phase factors in PTS is achievable using standard computing hardware. In this paper we present performance comparison of PTS technique using different number of sub-blocks (V=2, 4, 6 and 8) with different phase factors (W=2, 4 and 8) under Central Processing Unit (CPU) and Graphics Processing Unit (GPU) environments. The performance gain of GPU over CPU in terms of speedup is presented and the computational complexity involved is analyzed. The CPU is approx 3.7×, 7×, and 9× faster than CPU in case of 2, 4, and 8 phase factors respectively.
图形处理单元下PTS技术的计算复杂度分析
峰均功率比(PAPR)降低是正交频分复用(OFDM)信号处理的一个重要方面。使用PTS技术可以有效地实现PAPR的最小化。PTS的主要缺点是由于多次IFFT和相位因子计算的大阶数,计算量大。通常,使用标准计算硬件可以实现PTS中具有4个相位因子的4个子块的仿真。在本文中,我们比较了PTS技术在中央处理器(CPU)和图形处理单元(GPU)环境下使用不同数量的子块(V=2、4、6和8)和不同相位因子(W=2、4和8)的性能。介绍了GPU相对于CPU在加速方面的性能增益,并分析了涉及的计算复杂度。在相位因数为2、4和8时,CPU分别比CPU快3.7倍、7倍和9倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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