Design methodologies for consumer-use video signal processing LSIs

Abstract

This paper describes the methodologies used to design a Hi-Vision MUSE decoder for Japanese HDTV and codec LSIs for digital VCRs. Since a large amount of input video data is needed to verify the algorithms and logic designs, reducing the verification time is a key issue in designing these LSIs. We describe the methodology used to verify the video signal processing algorithm and that of the physical design.