A PCI Express board proposed for the upgrade of the ATLAS TDAQ read-out system

Abstract

During the next years a great number of laboratories all around the world will be involved in the upgrading of the main experiments at CERN’s LHC (ATLAS, CMS, LHCb, ALICE). The ATLAS Bologna group, which collaborates with the Pixel Detector DAQ, in the last two years has developed a prototype of a new board named PILUP (PIxel detector high Luminosity UPgrade); this board is a candidate for the redesign of the ATLAS DAQ required for High Luminosity LHC project. The main characteristics of this board are the embedded processor (dual-core ARM) and the large communication bandwidth (up to 60 Gb/s through optical fibers). The board is hence capable of managing complex systems and data transmissions suitable to meet the performance required to reach the next High Energy Physics goals. The PILUP has already demonstrated the capability to manage the communication with the main board of the ATLAS DAQ upgrade, the FELIX, using different communication protocols (GBT and Full-Mode). This is the first result of the collaboration with the FELIX group. Moreover, its features make it adaptable to be programmed as an emulator of several devices (front end electronic or read-out chips like the new RD53a). In conclusion, the characteristics of this new board and the experience of its team of developers open many directions for the use of the PILUP.