Automatic rule registration and deletion function on a packet lookup engine LSI

Abstract

A 100-MHz 51.2-Gb/s packet lookup engine LSI for packet inspection was proposed in a previous paper. High throughput and low power consumption was realized by introducing a combined mismatch detection circuit and linked-list hash table, minimizing the amount of memory accesses. The LSI has an automatic table update function. In this paper, this automatic rule registration and deletion function on the packet lookup engine LSI is described, meaning various tables included in the circuits, that is, the Mismatch Table, Index Table, and Rule Table are automatically configured by only inputting rules to be registered or deleted using embedded hardware on the LSI. This function utilizes a match and mismatch assessment for normal packet inspection operations.