Realization of an efficient VLSI architecture for discrete wavelet transform in real time image compression

Abstract

The discrete wavelet transforms is used as a forward transform in the JPEG2000 standard for still image compression. An eflcient VLSI architecture is presented and its performance is evaluated and compared to the previously proposed architectures. This architecture is functionally simulated and synthesized on two dserent types of FPGA chips, the design statistics and dynamic performance (maximum switching frequency) turned out to be practically feasible.