Reusable platform design methodology for SoC integration and verification

Abstract

Today system-on-a-chip (SoC) is like a black hole which draws all the important IP/cores in a digital system. Current SoC design methodologies are no longer adequate to meet the challenges of SoC design productivity, design quality and diminishing time-to-market window. This paper describes an innovative SoC platform integration and verification design methodology to enhance design productivity based on IP reuse and IP-XACT standard. Platform integrator including RPTKit (reusable platform toolkit) is developed to improve the efficiency and reliability in platform integration, and platform verifier to improve verification setup time and work efficiency. Several cases of SoC platform designs substantiate the validity and capability of the platform integrator and verifier, which reduced the total SoC integration and verification time by more than 30%.