Low-power data memory communication for application-specific embedded processors

A. Orailoglu, Peter Petrov
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引用次数: 9

Abstract

We propose a novel customization methodology for power reduction on the communication link between an embedded processor and its data memory. We target the address bus and show how by utilizing application information about the memory references in the data intensive program loops, a power efficient address communication protocol can be established between the processor core and the data memory. The data memory controller thus generates the addresses for the various data streams with minimal run-time information from the processor engine, achieving significant power reductions on the address bus. An efficient reprogrammable hard-ware ware support is presented for enabling the proposed methodology. The experimental results demonstrate the efficacy of the approach for a set of data intensive applications.
用于特定应用的嵌入式处理器的低功耗数据存储器通信
我们提出了一种新颖的定制方法,用于降低嵌入式处理器与其数据存储器之间通信链路的功耗。我们以地址总线为目标,展示了如何利用数据密集型程序循环中有关内存引用的应用程序信息,在处理器核心和数据存储器之间建立一个节能的地址通信协议。因此,数据存储器控制器使用来自处理器引擎的最小运行时信息为各种数据流生成地址,从而在地址总线上实现显著的功耗降低。为实现所提出的方法,提出了一种有效的可重编程硬件支持。实验结果证明了该方法在一系列数据密集型应用中的有效性。
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